BJT Calculator: Biasing, Amplification, and Switching

A base voltage divider combined with an emitter resistor is the bias arrangement to use when the circuit must work with any transistor of the selected type. The reason is clear in the stability table: double β and see how much I_C moves. With R_E in place, the change remains only a few percent; without R_E, it would be proportional to β.

A common design rule is to make the divider current at least ten times I_B, so that V_B is set mainly by the divider rather than by the transistor. The calculation does not impose this rule — it uses the complete Thévenin model — but the table immediately shows whether you have satisfied it.

Power dissipation is the line that is easiest to forget: a TO-92 package without a heatsink is typically limited to roughly 300–500 mW, and at 12 V only 30 mA can be enough to reach that range.

V_BE decreases by about 2 mV per degree: at 60 °C the operating point is no longer the one calculated at 25 °C. Change the temperature in the global parameters to see the effect.

The DC load line is the locus of operating points allowed by the supply and the resistors: from the ideal short-circuit current V_CC/(R_C+R_E) to cutoff at V_CE = V_CC. The Q-point lies on this line, and its position is determined by Card 1.

The AC load line is steeper because, for the signal, the collector sees R_C in parallel with R_L rather than R_C+R_E. It passes through the same Q-point and determines how much signal swing is available before clipping on either side.

The last value is the important one: the maximum symmetrical peak amplitude, namely the smaller of the distances from Q to saturation and from Q to cutoff. If those distances are very different, the operating point is not centered and a large part of the available signal swing is being wasted.

In analysis mode, the card starts from the operating point calculated by Card 1 and derives the small-signal parameters. With the emitter fully bypassed, the gain is \( A_v=-g_m(R_C\parallel R_L\parallel r_o) \): the minus sign represents phase inversion, while r_o is the gain limit imposed by the Early effect even if R_C were infinite.

As soon as an unbypassed R_E1 is added, the gain drops to \( \dfrac{-\beta R_C’}{r_\pi+(\beta+1)R_{E1}} \), but it also becomes almost independent of β and temperature: this is the usual trade-off between gain and repeatability. In this case I neglect r_o in the gain calculation because the resistance seen at the collector rises to \( r_o\left(1+g_m(R_{E1}\parallel r_\pi)\right) \) and becomes much larger than R_C. The resulting error is below one percent, and I prefer to state the approximation explicitly.

A_vs is the gain you actually measure: between the generator and the base there is a divider formed by R_s and Z_in. With Z_in of only a few kΩ and a 600 Ω source, about a quarter of the signal can already be lost before it reaches the transistor.

In design mode, the process is reversed: enter the required gain and collector current and the card selects the resistor values. The assumptions are explicit — V_E as a fraction of V_CC and divider current equal to ten times I_B — and the E24 and E96 columns immediately show the resulting commercial values and the gain they actually produce.

The three configurations are not three ways of doing the same job: they are different circuit tools. The common emitter provides voltage gain and phase inversion; the emitter follower has a gain just below unity but transforms a high impedance into a low one; the common-base stage has a Z_in of only a few tens of ohms, which is a disadvantage at low frequency but useful when terminating a 50 Ω line.

The table compares all three configurations at the same operating point, which is the only meaningful way to compare them. Look at the Z_out column: the emitter follower is in the tens of ohms, while the common-emitter stage is in the kΩ range. This, rather than gain, is why an emitter follower is so often placed at the end of a signal chain.

The emitter-follower equations include R_s, because Z_out depends on the impedance driving the base: \( Z_{out}=R_E\parallel\dfrac{r_\pi+(R_s\parallel R_1\parallel R_2)}{\beta+1} \).

The gain of two cascaded stages is not simply the product of their individual gains; that is one of the most common mental-calculation mistakes. Between the collector of the first stage and the base of the second there is a divider formed by Z_out1 and Z_in2. With two identical common-emitter stages — about 2 kΩ Z_out against 1.5 kΩ Z_in — more than 40% of the signal can be lost.

This is why an emitter follower is often inserted between stages: it adds almost no voltage gain, but it can reduce Z_out1 to a few tens of ohms and recover nearly all the signal otherwise lost in the divider. Try setting A_v1 = 0.99 and Z_out1 = 30 Ω and then check the loss line.

Each capacitor forms a first-order high-pass network with the resistance it sees: the equations are the same as those used in the first-order filters tool, applied three times with three different resistances.

The design rule used here is to place the C_E pole at the required lower cutoff frequency — it is the dominant pole because the resistance it sees is very small — and place the other two poles one decade lower so that their attenuation does not add significantly at cutoff. If all three poles are placed at the same frequency, the combined attenuation is about −9 dB rather than −3 dB.

The typical result can be surprising: C_E may be hundreds of microfarads, while C_in and C_out remain below one microfarad. The reason is that the emitter bypass capacitor sees \( \dfrac{r_\pi+R_s’}{\beta+1} \) in parallel with R_E, which is often only a few tens of ohms.

In switching operation the transistor is not in the active region, so β is not used to calculate I_C: the load determines the collector current, while β is used only to ensure that enough base current is supplied. This is the reason for overdrive: a forced β of roughly 10–20 is commonly targeted, meaning several times the minimum base current is applied so that the transistor remains saturated even with a low-gain device and at low temperature.

The trade-off is turn-off time: the more charge stored in the base, the longer it takes to remove it. For fast switching, a base-emitter resistor or a Schottky anti-saturation clamp can be used; for driving a relay or an LED, moderate overdrive is usually not a practical problem.

With an inductive load — relay, motor, or solenoid — a flyback diode connected across the load is always required; otherwise the turn-off voltage spike can exceed V_CEO and damage the transistor on the first switching event.

The β values are typical datasheet values at the stated collector current, not guaranteed limits: production spread can easily range from roughly half to twice the typical value, and β also changes with current and temperature in the same device. A circuit that works only with the typical β value is not a robust design.

V_A is rarely specified directly in datasheets: it can be estimated from the slope of the output-characteristic curves, and 100 V is a reasonable order-of-magnitude value for small-signal silicon BJTs. If you need an accurate value, measure it.